IEEE

An Efficient Bit-level Sparse MAC-accelerated Architecture with SW/HW Co-design on FPGA

Abstract: Exploring bit-level sparsity in the MAC process has been proven to be an important method for improving the efficiency of neural network feedforward processing. The reconfigurable platform ...
IEEE

HUNBN, a 16-nm Digital In-Memory-Compute SoC for Edge CNN Application Achieving 24 TOPs/W ...

Abstract: This work presents HUNBN, a fully digital in-memory-compute (DIMC) system-on-chip (SoC) implemented using 16-nm FinFET CMOS technology. Designed for edge convolution neural network (CNN) ...